With the goal of identifying technologies for efficient implementation of future AllGreenTech products, Jay Iyer researched and presented a paper on low-power system implementation technologies at University of California, Santa Barbara during the summer of 2012.

In this research, Jay evaluated the trade-off between low-power FPGAs (Field Programmable Gate Arrays) and off-the-shelf microcontrollers for implementing hardware designs.

As a typical hardware design for this research, Jay chose to specify and design a RISC (Reduced Instruction Set Computing) processor using the Verilog hardware description language, synthesize it, and implement it on a Xilinx Spartan 3E low-power FPGA.  

After designing and implementing this low-power FPGA (shown below), Jay published his findings in his report, Evaluating the Trade-off between Low-Power FPGAs and Off-the-Shelf Microcontrollers.